Semiconductor device and manufacturing method thereof

ABSTRACT

The present invention is related to a semiconductor device that forms an inductor on the same semiconductor substrate together with other active elements and a manufacturing method thereof. The semiconductor device of the present invention comprises a first conductivity type substrate, first semiconductor layer of a first conducting type with an impurity concentration lower than the substrate and a second semiconductor layer of a second conducting type on the first layer, an insulating film formed on this high-resistance semiconductor layer, and an inductor formed on this insulating film. The inductor has conducting film defining a width of the inductor. The first and second semiconductor layers are each formed under and at least as long as the width of the inductor.

BACKGROUND OF THE INVENTION

The present invention is related to a semiconductor device andmanufacturing method thereof and in particular to a semiconductor deviceand manufacturing method thereof that forms an inductor on the samesemiconductor substrate together with other active elements.

BACKGROUND ART

As a passive element, an inductor is normally formed by a so-calledexternal attachment method that connects the inductor using a wire of awire bond after forming an active element such as a transistor on asemiconductor substrate. If, however, we take into account the demandsfor compatibility with higher frequencies accompanying the everincreasing higher performance of integrated circuits, it has becomeimpossible to ignore the inductance contained in the connecting wire.Consequently, in recent years methods have been employed tosimultaneously form inductors on the same semiconductor substratestogether with other active elements.

When forming inductors on the same semiconductor substrates togetherwith other active elements, the compositions shown in FIGS. 10A and 10Bare normally employed. Namely, the principal part of the inductor 60 isthe spiral A1 wiring layer 62 formed in a spiral shape using a wirematerial with a low resistance such as A1. In order to reduce theparasitic capacitance between the inductor 60 and the semiconductorsubstrate 64, the spiral A1 wiring layer 62 is formed on the fieldoxidation film 66 that is formed on the semiconductor substrate 64 andthe spiral A1 wiring layer 62 is also formed on the interlayerinsulating film 68. In other words, the parasitic capacitance occurringbetween the semiconductor substrate 64 is reduced by means of placingthe field oxidation film 66 and the interlayer insulating film 68between the spiral A1 wiring layer 62 and the semiconductor substrate64.

Even with this type of composition, however, since the semiconductorsubstrate 64, that has a certain amount of resistivity, exists under thespiral A1 wiring layer 62 via the field oxidation film 66 and theinterlayer insulating film 68, an electrical current flows on thesemiconductor substrate 64 side at high frequencies, incurring asituation in which it is impossible to ignore loss due to this currentflow which is a factor in reducing the Q value that is one indicator ofinductance characteristics. Even further, magnetic flux occurring inthis inductor 60 causes an eddy current to occur in the semiconductorsubstrate 64 which also causes the inductance to drop. In other words,such a phenomenon hinders the element characteristics of the inductor 60from improving and produces extreme disadvantages in the production ofhigh-performance semiconductor integrated circuits.

Therefore, for inductors simultaneously formed on the same semiconductorsubstrates together with other active elements it has been difficult toobtain favorable element characteristics such as Q values compared towhen forming inductors using an external attachment method afterformation of other active elements and there were many disadvantages inthe production of high-performance semiconductor integrated circuits.

Various measures have been considered from the past to counter thecharacteristic degradation such as this type of reductions in Q valuesof inductors. For example, reductions in the impurity concentration ofthe semiconductor substrate leading to high resistance has beenconsidered. For this case, element characteristics such as the Q valueare improved by reducing the current flowing in the semiconductorsubstrate and controlling the loss caused by that current. However, ifthe impurity concentration of the semiconductor substrate is simplyreduced leading to high resistance, the electric potential of thesemiconductor substrate will evenly drop and the semiconductor substrateof the integrated circuit will be very poor. Furthermore, when formingother elements such as bipolar transistors or MOS transistors on thesame substrate, the problem of a latch-up phenomenon would occur due tothis. Consequently, it is impossible to simply increase the resistanceof a semiconductor substrate from the standpoint of integrated circuitreliability.

The use of an insulated substrate such SOI (Silicon On Insulator) hasalso been considered as a semiconductor substrate. This is a veryeffective method for eliminating the loss caused by current flowing inthe semiconductor substrate. Unfortunately, manufacturing methods ofintegrated circuits using SOI are complicated and have problems relatedto cost.

There are also methods to reduce parasitic capacitance by means ofincreasing the thickness of the film of the interlayer insulating filmbetween the inductor and the semiconductor substrate. For this casehowever, when the thickness of the film of the interlayer insulatingfilm is thickened, electrodes with deep level differences must be formedwhile opening up apertures on the insulating film for other elementsformed on the same substrate and forming electrodes which form a wiringlayer for connecting to this element. Because of this, the shape of thewiring layer embedded on that electrode portion becomes very poorleading to the possibility of problems such as poor contact.

DISCLOSURE OF THE INVENTIONS

The present invention is implemented in view of the above-mentionedcircumstances and its object is, in a semiconductor device forsimultaneously forming inductors on the same semiconductor substratetogether with other active elements and a manufacturing method thereof,to provide a semiconductor device equipped with favorable elementcharacteristics as prevents reductions in Q values and inductanceaccompanying loss caused by the flow of electrical current on thesemiconductor substrate side and a manufacturing method of asemiconductor device that can produce inductors which have this type offavorable element characteristics.

As a method for reducing the parasitic capacitance that parasitizebetween the inductor and semiconductor substrate, putting in place ahigh resistance layer between the interlayer insulating film, fieldoxidation film under the inductor and the semiconductor substrate hasalso been considered. For this method, even at high frequencies not onlyis the current flowing in the high-resistance layer and semiconductorsubstrate is reduced thereby controlling loss caused by this current,which in turn improves the element characteristics such as Q values,problems of integrated circuit reliability when increasing theresistance of the semiconductor substrate itself and poor contact whenthickening the interlayer insulating film.

Thereupon, a high-resistance layer is put in place between theinterlayer insulating film, field oxidation film under the inductor andthe semiconductor substrate as a measure to obtain favorable elementcharacteristics such as Q values of inductors when simultaneouslyforming an inductor on the same semiconductor substrate together withother active elements. The processes to form this high-resistance layer,however, are prepared as specialized and dedicated processes to forminductors and as such lead to reduced productivity and increased costaccompanying an increased number of processes. Then, it is conceivablethat this high-resistance layer doubles as an n type epitaxial layerthat forms an n type collector region of an ordinary NPN bipolartransistor. For this case, however, if the resistance of this n typeepitaxial layer is increased to a high resistance, drawbacks in thebipolar transistor characteristics will occur such as reduced breakdownvoltage between the collector—emitter junction of the NPN bipolartransistor. Consequently, this is not recommended.

Further, in order to reduce the parasitic capacitance, the inductor isformed on a field oxidation film although the n type epitaxial layerthat forms the collector region is oxidized while forming the fieldoxidation film under the inductor, which leads to the film thickness ofthe n type epitaxial layer under the field oxidation film inevitablygrowing thinner. As a result, there are more chances that the magneticflux occurring in the inductor will pass through a thin n type epitaxiallayer, increasing the impurity concentration and finally reaching thesemiconductor substrate with a low resistivity. This leads to reducedinductance due to the generation of the eddy current described above. Asa countermeasure against this, simply forming a thick n type epitaxiallayer has been considered. For this measure, however, increases in thecollector resistance of the NPN bipolar transistor and worseningfrequency characteristics occur and, after all this is not recommendedto increase the performance of integrated circuits.

Consequently, it is difficult to use a high-resistance layer disposedbetween the interlayer insulating film and field oxidation film underthe inductor and the semiconductor substrate as an n type epitaxiallayer that forms an n type collector region of an NPN bipolar transistorfor the purpose of decreasing the number of processes. Therefore, evenif placing a high-resistance layer between the interlayer insulatingfilm, field oxidation film under the inductor and the semiconductorsubstrate is ideal in order to obtain favorable device characteristicssuch as Q values for inductors simultaneously formed on the samesemiconductor substrates together with other active elements, formingthat high-resistance layer still remains a problem.

Methods to solve this problem are as follows.

The semiconductor device related to the present invention ischaracterized by comprising a substrate (semiconductor substrate), asemiconductor layer (high resistance semiconductor layer) formed on thissubstrate that has an impurity concentration lower than the impurityconcentration of the substrate, an insulating film formed on thissemiconductor layer, and an inductor formed on this insulating film.

The inductor is preferably formed of a conducting film formed in aspiral shape. The substrate can be a first conducting type and thesemiconductor layer can be a first conducting type. The thickness of thesemiconductor layer is preferably between 5 to 15 μm.

The impurity concentration of the substrate layer is preferably between1×10¹³ to 1×10¹⁴ cm⁻³.

The semiconductor device related to the present invention ischaracterized in that the substrate is a first conducting type (or firstconductivity type) and the semiconductor layer is formed on a firstconducting type first semiconductor layer. A second conducting type (orsecond conductivity type) second semiconductor layer is also formedbetween the insulating film and the first semiconductor layer.

The thickness of the first semiconductor layer is preferably thickerthan the thickness of the second semiconductor layer. For example, itcan be between 5 to 15 μm. The impurity concentration of the firstsemiconductor layer is preferably between 1×10¹³ to 1×10¹⁴ cm⁻³ and theimpurity concentration of the second semiconductor layer is preferablybetween 1×10¹⁵ to 1×10¹⁶ cm⁻³.

In each of the above-mentioned semiconductor devices the semiconductordevice related to the present invention is characterized in that abipolar transistor and a photo diode are formed on the same substrate.

Hereupon, in the semiconductor device that has a first semiconductorlayer and a second semiconductor layer, it is preferable for the firstsemiconductor layer to be comprised of an anode or a cathode of a photodiode and the second semiconductor layer to be comprised of an anode ora cathode of a photo diode. Namely, when the first semiconductor layeris comprised of an anode of a photo diode, the second semiconductorlayer will be comprised of a cathode of a photo diode. Conversely, whenthe first semiconductor layer is comprised of a cathode of a photodiode, the second semiconductor layer will be comprised of an anode of aphoto diode. In addition, it is preferable for the second semiconductorlayer to be comprised of a collector of a bipolar transistor. In each ofthe above-mentioned semiconductor devices, it is preferable for a regionwith an impurity concentration higher than the high-resistancesemiconductor layer (semiconductor layer or first semiconductor layer)to be formed under regions which do not correspond to the regions wherean inductor is formed.

The manufacturing method of a semiconductor device related to thepresent invention is characterized by including a process that forms asemiconductor layer (high-resistance semiconductor layer) with animpurity concentration lower than the substrate (semiconductorsubstrate) whereon it is formed, a process that forms an insulating filmon this semiconductor layer, a process that forms a conducting film onthis insulating film and a process that patterns this conducting film ina spiral shape to form an inductor.

In like manner to the above, the substrate can be a first conductingtype and the semiconductor layer can be first conducting type. Thethickness of the semiconductor layer is preferably between 5 to 15 μm.The impurity concentration of the semiconductor layer is preferablybetween 1×10¹³ to 1×10¹⁴ cm⁻³.

The manufacturing method of a semiconductor device related to thepresent invention is characterized in that the above-mentionedmanufacturing method of a semiconductor device has a process that formsa semiconductor layer on the first conducting type first semiconductorlayer and then between the process to form this first semiconductorlayer and the process to form the insulating film successively forms asecond conducting type second semiconductor layer on the firstsemiconductor layer.

In like manner to the above, the thickness of the first semiconductorlayer is preferably thicker than the thickness of the secondsemiconductor layer. For example, between 5 to 15 μm. The impurityconcentration of the first semiconductor layer is preferably between1×10¹³ to 1×10¹⁴ cm⁻³ and the impurity concentration of the secondsemiconductor layer is preferably between 1×10¹⁵ to 1×10¹⁶ cm⁻³.

The manufacturing method of a semiconductor device related to thepresent invention is characterized in that each of the above-mentionedmanufacturing methods of a semiconductor device has a process to form abipolar transistor and photo diode on the same substrate.

Hereupon, in like manner to the above, in the manufacturing method of asemiconductor device that has a first semiconductor layer and a secondsemiconductor layer, it is preferable for the first semiconductor layerto be comprised of the anode or cathode of the photo diode and thesecond semiconductor layer to be comprised of the cathode or anode ofthe photo diode. Moreover, it is preferable for the second semiconductorlayer to be formed so it functions as the collector of the bipolartransistor. In the above-mentioned manufacturing methods of asemiconductor device, it is preferable to have a process that forms aregion with an impurity concentration higher than the high-resistancesemiconductor layer (semiconductor layer or first semiconductor layer)under regions which do not correspond to the regions where the inductoris formed.

According to the semiconductor device related to the present invention,a composition is obtained wherein a semiconductor layer with a lowimpurity concentration, namely a high-resistance semiconductor layer, isdisposed between the insulating film under the inductor and thesubstrate by means of providing a substrate, a semiconductor layerformed on the substrate that has an impurity concentration lower thanthe substrate, an insulating film formed on the semiconductor layer, andan inductor formed on the insulating film. Because of this, even at highfrequencies current flowing in the high-resistance semiconductor layerand substrate is reduced thereby making it possible to control losscaused by this current. Consequently, a high performance inductor withfavorable device characteristics that has a Q value and inductancehigher than a conventional inductor can be obtained which also makes itpossible to obtain semiconductor integrated circuits with even morefeatures and higher performance. Further, since the resistance of thesemiconductor substrate itself is not increased nor is the thickness ofthe insulating film between the inductor and substrate made thicker, thenecessity of being concerned about problems such as the reliability ofsemiconductor integrated circuits whereon other active elements areformed together with the inductors as well as problems of poor contactis eliminated.

According to the semiconductor device related to the present invention,in the semiconductor devices mentioned above, when the substrate is afirst conducting type, the semiconductor layer forms on the firstconducting type first semiconductor layer and the second conducting typesecond semiconductor layer forms between the insulating film and thefirst semiconductor layer, a composition is obtained wherein a pnjunction formed on the first conducting type first semiconductor layer(high-resistance semiconductor layer) and the second conducting typesecond semiconductor layer is between the insulating film under theinductor and the substrate. Because of this, in addition to acapacitance formed from the insulating film, a comparatively small pnjunction capacitance is added in series by the first conducting typefirst semiconductor layer (high-resistance semiconductor layer) and thesecond conducting type second semiconductor layer between the inductorand the substrate, making it possible to greatly reduce the overallparasitic capacitance more compared to a conventional case.Consequently, a high performance inductor with favorable devicecharacteristics that has a Q value and inductance higher than aconventional inductor can be obtained which also makes it possible toobtain semiconductor integrated circuits with even more features andhigher performance. Further, since the resistance of the semiconductorsubstrate itself is not increased nor is the thickness of the insulatingfilm between the inductor and substrate made thicker, the necessity ofbeing concerned about problems such as the reliability of semiconductorintegrated circuits whereon other active elements are formed togetherwith the inductors as well as problems of poor contact is eliminated.

In the above-mentioned semiconductor devices, by means of providing acomposition with the photo diode and the bipolar transistor formed onthe same semiconductor substrate it is also possible to obtainsemiconductor integrated circuits with even more features and higherperformance which have the inductor, the bipolar transistor and thephoto diode mounted. Photo diodes are widely used in, for example, photosensors which convert optical signals to electrical signals in varioustypes of photoelectric conversion devices.

When the first semiconductor layer is comprised as a cathode or an anodeof a photo diode and the second semiconductor layer is comprised as acathode or an anode of a photo diode, the first conducting type firstsemiconductor layer (high-resistance semiconductor layer) is also usedas a p type semiconductor layer or an n type semiconductor layer whichform an anode of a PN photo diode and the second conducting type secondsemiconductor layer is also used as an n type semiconductor layer or a ptype semiconductor layer which form a cathode of a PN photo diode.Because of this, it becomes unnecessary to increase specialized anddedicated processes to form inductors. Therefore, a high performanceinductor with favorable device characteristics that has a high Q valueand high inductance can be realized without any reductions inproductivity or increases in cost occurring, which also makes itpossible to obtain semiconductor integrated circuits with even morefeatures and higher performance.

When the second semiconductor layer is comprised as a collector of abipolar transistor, the second semiconductor layer is also used as asemiconductor layer that forms the collector of a bipolar transistor.Because of this, it becomes unnecessary to increase specialized anddedicated processes to form inductors. Therefore, a high performanceinductor with favorable device characteristics that has a high Q valueand high inductance can be realized without any reductions inproductivity or increases in cost occurring, which also makes itpossible to obtain semiconductor integrated circuits with even morefeatures and higher performance.

When forming a region of a first conducting type with an impurityconcentration higher than the high-resistance semiconductor layer(semiconductor layer, first semiconductor layer) under regions which donot correspond to the regions where the inductor is formed in asemiconductor device in which the inductor, bipolar transistor and photodiode are formed on the same substrate, highly reliable semiconductorintegrated circuits can be obtained in which the problem of a latch-upphenomenon is difficult to appear.

According to the manufacturing method of the semiconductor devicerelated to the present invention, it is easy to form a compositionwherein a semiconductor layer with a low impurity concentration, namelya high-resistance semiconductor layer, is disposed between theinsulating film under the inductor and the substrate by means of forminga semiconductor layer with an impurity concentration lower than thesubstrate whereon it is formed, forming an insulating film on thissemiconductor layer, forming a conducting film on this insulating film,and then patterning this conducting film into a spiral shape to form aninductor. Because of this, even at high frequencies current flowing inthe high-resistance semiconductor layer and substrate is reduced,thereby making it possible to control loss caused by this current.Consequently, a high performance inductor with favorable devicecharacteristics that has a Q value and inductance higher than aconventional inductor can be obtained, which also makes it possible toobtain semiconductor integrated circuits with even more features andhigher performance. Further, since the resistance of the substrateitself is not increased nor is the thickness of the insulating filmbetween the inductor and substrate made thicker, the necessity of beingconcerned about problems such as the reliability of semiconductorintegrated circuits whereon other active elements are formed togetherwith the inductors as well as problems of poor contact is eliminated.

According to the manufacturing method of the semiconductor devicerelated to the present invention, in the manufacturing methods of thesemiconductor device, a semiconductor layer is formed of the firstconducting type first semiconductor layer, and when there is a processthat successively forms the second conducting type second semiconductorlayer on the first semiconductor layer between the process that formsthe first semiconductor layer and the process to form the insulatingfilm, it is easy to form a composition wherein a pn junction formed onthe first conducting type first semiconductor layer (high-resistancesemiconductor layer) and the second conducting type second semiconductorlayer is between the insulating film under the inductor and thesubstrate. Because of this, between the inductor and the substrate, acomparatively small pn junction capacitance is added in series by thefirst conducting type first semiconductor layer (high-resistancesemiconductor layer) and the second conducting type second semiconductorlayer in addition to a capacitance formed from the insulating film,thereby making it possible to greatly reduce the overall parasiticcapacitance more compared to a conventional case. Consequently, a highperformance inductor with favorable device characteristics that has a Qvalue and inductance higher than a conventional inductor can be obtainedwhich also makes it possible to obtain semiconductor integrated circuitswith even more features and higher performance. Further, since theresistance of the semiconductor substrate itself is not increased nor isthe thickness of the insulating film between the inductor and substratemade thicker, the necessity of being concerned about problems such asthe reliability of semiconductor integrated circuits whereon otheractive elements are formed together with the inductors as well asproblems of poor contact is eliminated.

In the above-mentioned manufacturing methods of the semiconductordevice, by means of having a process that forms the bipolar transistorand photo diode on the same substrate, it is possible to producesemiconductor integrated circuits with even more features and higherperformance which have the inductor, the bipolar transistor and thephoto diode mounted. Photo diodes are widely used in, for example, photosensors which convert optical signals to electrical signals in varioustypes of photoelectric conversion devices.

When the first conducting type first semiconductor layer is comprised asan anode or a cathode of a photo diode and the conducting type secondsemiconductor layer is comprised as an anode or a cathode of a photodiode, the first semiconductor layer is formed between the insulatingfilm under the inductor and the substrate simultaneous with theformation of a p type semiconductor layer that forms the anode or an ntype semiconductor layer that forms the cathode of a PN photo diode.Even further, an n type semiconductor layer that forms the cathode and ap type semiconductor layer that forms the anode of a PN photo diode aresimultaneously formed with the second semiconductor layer. Because ofthis, it becomes unnecessary to increase specialized and dedicatedprocesses to form inductors. Therefore, a high performance inductor withfavorable device characteristics that has a high Q value and highinductance can be realized without any reductions in productivity orincreases in cost occurring, which also makes it possible to obtainsemiconductor integrated circuits with even more features and higherperformance.

When the second semiconductor layer is formed to function as a collectorof a bipolar transistor, the second semiconductor layer forms betweenthe insulating film under the inductor and the substrate simultaneouswith the semiconductor layer that forms the collector region of thebipolar transistor. Because of this, it becomes unnecessary to increasespecialized and dedicated processes to form inductors. Therefore, a highperformance inductor with favorable device characteristics that has ahigh Q value and high inductance can be realized without any reductionsin productivity or increases in cost occurring which also makes itpossible to obtain semiconductor integrated circuits with even morefeatures and higher performance.

In the manufacturing method of the semiconductor device that forms theabove-mentioned inductor, bipolar transistor and photo diode on the samesubstrate, when there is a process that forms a region of a firstconducting type with an impurity concentration higher than thehigh-resistance semiconductor layer (semiconductor layer, firstsemiconductor layer) under regions which do not correspond to theregions where the inductor is formed, highly reliable semiconductorintegrated circuits can be obtained in which the problem of a latch-upphenomenon is difficult to appear.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross sectional view of a process (1) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 2 is a cross sectional view of a process (2) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 3 is a cross sectional view of a process (3) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 4 is a cross sectional view of a process (4) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 5 is a cross sectional view of a process (5) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 5 is a cross sectional view of a process (5) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 6 is a cross sectional view of a process (6) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 7 is a cross sectional view of a process (7) for explaining amanufacturing method of a semiconductor integrated circuit in which aninductor is mixedly loaded on the same semiconductor substrate togetherwith a photodiode and a bipolar transistor according to an embodiment ofthe present invention.

FIG. 8A is a plan view of the inductor which was completed through theprocesses shown in FIG. 1 to FIG. 7, respectively while FIG. 8B is asectional view thereof along A-A line.

FIG. 9A is a plan view showing a modified example of the inductor shownin FIG. 8A while FIG. 9B is a sectional view showing a modified examplethereof along A-A line.

FIG. 10A is a plan view of a conventional inductor while FIG. 10B is asectional view thereof.

DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENTS

In the following, embodiments of the present invention will be describedreferring to the drawings.

FIG. 1˜FIG. 7 are cross sectional views of processes which serve todescribe the semiconductor device and manufacturing method thereofwherein an inductor is mixedly mounted onto the same semiconductorsubstrate together with a photodiode and bipolar transistor. FIGS. 8Aand 8B are plan views and cross sections along A-A line that show aninductor completed through the processes shown in FIG. 1˜FIG. 7. FIGS.9A and 9B are cross sections that show a modified example of theinductor shown in FIGS. 8A and 8B.

In each of the cross sectional views of the processes in FIG. 1˜FIG. 7,the regions where each of the devices, the inductor, the photodiode andthe bipolar transistor, are formed on the semiconductor substrate willbe described as inductor formation region A, photodiode formation regionB and bipolar transistor formation region C, respectively.

At first, a photo resist patterned by ordinary photolithographytechnology is made into a mask after forming a thin thermally-oxidizedfilm on the surface of p type semiconductor substrate 10 with animpurity concentration of approximately 1×10¹⁵ cm⁻³. Then, usingordinary implantation technology p type impurities, such as Boron (B),are selectively ion implanted onto the entire region of inductorformation region A under conditions of an acceleration voltage of 30 KeVand a doping amount of 1×10¹⁵ cm⁻². Continuing, a high concentration ofp type impurity ions implanted on the surface of the p typesemiconductor substrate 10 are activated by a thermal process with atemperature of 1200° C. for approximately 1 hour and diffused on thesurface of the p type semiconductor substrate 10 to form the highdensity p+ type semiconductor region 12 with a peak concentration ofapproximately 1×10¹³ cm⁻³. Thereafter, the entire surface of theabove-mentioned thin thermally-oxidized film is separated usinghydrofluoric acid (HF). (Refer to FIG. 1.)

Next, a low density p-type epitaxial layer 14 with a film thickness ofapproximately 10 μm and an impurity concentration of approximately2×10¹⁴ cm⁻³ is formed on the p type semiconductor substrate 10 and thep+ type semiconductor region 12. This p-type epitaxial layer 14 is alayer formation region forming an anode of the photo diode later. (Referto FIG. 2.)

Next, a photo resist patterned by ordinary photolithography technologyis made into a mask after forming a thin thermally-oxidized film on thesurface of the p-type epitaxial layer 14. Then, using ordinaryimplantation technology p type impurities, such as Boron, areselectively ion implanted onto the entire region of the p-type epitaxiallayer 14 except for the inductor formation region A and the photo diodeformation region B under conditions of an acceleration voltage of 500KeV and a doping amount of 1×10¹² cm⁻². Continuing, a low concentrationof p type impurity ions implanted onto the p-type epitaxial layer 14,such as the bipolar transistor formation region C, are activated by athermal process with a temperature of 1200° C. for approximately 1 hourand diffused to form the low density p type well layer 16 with animpurity concentration of approximately 1×10¹⁵ cm⁻³ near the surface.Thereafter, the entire surface of the above-mentioned thinthermally-oxidized film is separated using hydrofluoric acid. At thistime the impurities close to the surface of the p type well layer 16correspond to the substrate concentration of the bipolar transistor.Therefore, it becomes possible to match the characteristics to thebipolar transistor formed on the bipolar transistor formation region C(Refer to FIG. 3.)

Next, antimony (n type impurity) is selectively added onto the surfaceof the p type well layer 16 of the bipolar transistor formation region Cby gas vapor diffusion of antimony (Sb) under conditions of, forexample, a temperature of 1100˜1250° C. for approximately 30˜60 minutesto form a high density n+ type embedded layer 18 to reduce the collectorparasitic capacitance. In addition, the thermal diffusion process thatforms the p type well layer 16 in the process shown in FIG. 3 above canalso be used as the thermal diffusion process that forms this n+ typeembedded layer 18 and the number of times the thermal diffusion processexecutes can also be reduced. Continuing, an n type epitaxial layer 20with a film thickness of 1 μm and an impurity concentration ofapproximately 5×10¹⁵ cm⁻³ forms on the entire base substance, namely,the p− type epitaxial layer 14, the p type well layer 16 and the n+ typeembedded layer 18 following an ordinary bipolar transistor process.(Refer to FIG. 4.)

Next, a field oxidation film 22 approximately 400˜1500 nm thickselectively forms on the separation portion between the elements (fieldportion) of the inductor formation region A, the photo diode formationregion B and the bipolar transistor formation region C using a LOCOS(Local Oxidation of Silicon: selective oxidation) method. In otherwords, after forming a layered film comprising an Si oxidation film andan Si nitride film on the normally used n type epitaxial layer 20 andthen selectively etching away this layered film using an R1E method thatforms a photo resist patterned by photolithography technology into amask and only exposing the region where the field oxidation film 22 willbe formed, the exposed n type epitaxial layer 20 is selectively oxidizedusing the Si nitride film of the layered film as a mask to form thefield oxidation film 22. At this time, there is a method to remove onepart of all of the exposed n type epitaxial layer 20 before forming thefield oxidation film 22. For this case, if we consider merging theportions of the n type epitaxial layer 20 oxidized by the continuouslyexecuting selective oxidation, there is a possibility that none of the ntype epitaxial layer 20 will remain on the inductor formation region A.The present invention, however, has no restrictions as far as that isconcerned. Hereupon, a case in which the n type epitaxial layer 20remains between the p− type epitaxial layer 14 and the p type well layer16 and field oxidation film 22 is shown. (Refer to FIG. 5.)

Continuing, together with the n+ type collector DERIVING region 24, thatconnects to the p+ type embedded layer of the bipolar transistorformation region C, forming and the p+ type anode DERIVING region 26,that connects to the p− type epitaxial layer 14 of the photo diodeformation region B, forming following with the manufacturing process ofa bipolar transistor and photo diode, the p+ type element isolationregion 28 forms under the field oxidation film 22 and separation of thephoto diode formation region B and the bipolar transistor formationregion C occurs. Further, accompanying this element separation,hereinafter, the n type epitaxial layer 20 under the field oxidationfilm 22 of the inductor formation region A is referred to as the n typesemiconductor layer 20 a, the n type epitaxial layer 20 of the photodiode formation region B is referred to as the n type cathode layer 20 band the n type epitaxial layer 20 of the bipolar transistor formationregion C is referred to as the n type collector layer 20 c. Furthermore,the p− type epitaxial layer 14 under the field oxidation film 22 of theinductor formation region A is referred to as the p− typehigh-resistance semiconductor layer and the p− type epitaxial layer 14under the n type cathode layer 20 b of the photo diode formation regionB is referred to as the p− type anode layer 14 b. Continuing, togetherwith n+ type anode DERIVING region 30 forming on the surface of the ntype cathode layer 20 b of the photo diode formation region B, the ptype base region 32 forms on the n type collector layer 20 c of thebipolar transistor formation region C and the p+ type base DERIVINGregion forms on this p type base region 32. After forming the emitterDERIVING electrode 36, comprised of a polysilicon to which n typeimpurities are added, on the p type base region 32 of the bipolartransistor formation region C, the n+ type emitter region 38 forms onthe p type base region 32 by means of impurity diffusion from thisemitter DERIVING electrode 36. Continuing, after forming the first layerinsulating film 40, comprised of, for example, Si oxidized film, on theentire base substance, collector holes form at specified locations onthe photo diode formation region B and the bipolar transistor formationregion C using photolithography and etching technologies. Then, afterdepositing the A1 film on the entire base substance and embedding eachcontact hole, this A1 film undergoes patterning processing usingphotolithography and R1E technologies. Thus, in the inductor formationregion A, the leader A1 wiring layer 42, that functions to extract theinductor terminal (formed later) from the inside, forms on that firstlayer insulating film 40. In like manner, in the photo diode formationregion B, the anode A1 electrode 42 a, that connects to the p+ typeanode DERIVING region 26, forms and the cathode A1 electrode 42 b, thatconnects to the n+ type anode DERIVING region 30, forms. Moreover, inthe bipolar transistor formation region C, the emitter A1 electrode 42Ethat connects to the n+ type emitter region 38 through the emitterDERIVING electrode 36 forms, the base A1 electrode 42B that connects tothe p+ type base DERIVING region 34 forms, and the collector A1electrode 42C that connects to the n+ type collector DERIVING regionforms. Thus, the PN photo diode 44 is completed in the photo diodeformation region B and the NPN bipolar transistor 46 is completed in thebipolar transistor formation region C. (Refer to FIG. 6.)

Although examples of manufacturing processes which are fundamentallyalready known were described for the processes to form the PN photodiode 44 and the NPN bipolar transistor 46, as long as the formationprocess of the p− type epitaxial layer 14 to form the p− typehigh-resistance semiconductor layer 14 a of the inductor formationregion A and the p− type anode layer 14 b of the PN photo diode 44 isused as well as the formation process of the n type epitaxial layer 20to form the n type semiconductor device 20 a of the inductor formationregion A, the n type cathode layer 20 b of the PN photo diode 44 and then type collector layer 20 c of the NPN bipolar transistor 46 is used,the present invention is not limited to these even if some differentmethods are used to form other compositional elements. Furthermore, theleader A1 wiring layer 42 in the inductor formation region A is formedsimultaneously in the same process at the formation processes of theanode A1 electrode 42 a and the cathode A1 electrode 42 b of the PNphoto diode 44, the emitter A1 electrode 42E, the base A1 electrode 42Band the collector A1 electrode 42C of the NPN bipolar transistor 46.There are no problems even if separate formations occur in separateprocesses. When forming this leader A1 wiring layer 42, simultaneouslyforming an A1 layer for connecting other elements in regions outside theinductor formation region naturally becomes possible.

Next, after forming the second interlayer insulating film 48, comprisedof an Si oxidized film, on the entire base substance using, for example,a p (plasma) TEOS [tetraethoxy silane; Si(OC₂ H₅₎ ₄] method, this secondinterlayer insulating film 48 is selectively removed usingphotolithography and R1E technologies to form contact holes which exposethe leader A1 wiring layer 42. Continuing, after forming A1 on theentire base substance, this A1 film undergoes patterning processingusing photolithography and R1E technologies to form the spiral A1 wiringfilm 50 a on the second interlayer insulating film 48 in the inductorformation region A. This is accompanied by the A1 terminal electrode 50b (for external connections) forming connected to the end of the insideof this spiral A1 wiring film 50 a by way of the leader A1 wiring layer42. Thus, the inductor 52 is completed comprised of the spiral A1 wiringfilm 50 a, the leader A1 wiring layer 42 and the A1 terminal electrode50 b (for external connections) in the inductor formation region A.(Refer to FIG. 7.) In like manner to forming the above-mentioned leaderA1 wiring layer 42, when forming this spiral A1 wiring film 50 asimultaneously forming an A1 layer for connecting other elements inregions outside the inductor formation region naturally becomespossible.

Next, although it is not shown in the Figures, an overcoat film forms onthe entire base substance and pad portions further open up at specifiedlocations. Thus, a semiconductor integrated circuit is completed whereinthe inductor is mixed mounted onto the same p type semiconductorsubstrate 10 together with a photo diode and bipolar transistor.

Next, the inductor 52 completed by the processes above will be describedusing FIGS. 8A and 8B. Namely, the spiral A1 wiring film 50 a of theinductor 52 is connected to the A1 terminal electrode 50 b (for externalconnections) by way of the leader A1 wiring layer 42 on the end of theinside. The end of the outside of the spiral A1 wiring film 50 afunctions as a terminal for external connections as is without anymodifications. Because of this, the spiral A1 wiring film 50 a of thisinductor 52 can easily connect other elements. Further, this type ofinductor 52 is formed on the p type semiconductor substrate 10 throughthe p− type high-resistance semiconductor layer 14 a, the n typesemiconductor layer 20 a, the field oxidation film 22 and the first andsecond layer insulating films 40, 48. In other words, the pn joined p−type high-resistance semiconductor layer 14 a and n type semiconductorlayer 20 a are disposed between the p type semiconductor substrate 10,the field oxidation film 22 and the first and second layer insulatingfilms 40, 48.

According to the best mode as described above, in a semiconductorintegrated circuit wherein the inductor 52 is mixed mounted onto thesame p type semiconductor substrate 10 together with the PN photo diode44 and the NPN bipolar transistor 46, not only is the p− typehigh-resistance semiconductor layer 14 a disposed between the p typesemiconductor substrate 10 under the spiral A1 wiring film 50 a (thatcomprises the principal parts of the inductor 52), the field oxidationfilm 22 and the first and second layer insulating films 40, 48, acomposition is also formed in which the n type semiconductor layer 20 athat is pn joined with this p− type high-resistance semiconductor layer14 a is also disposed between them. Because of this, a capacitanceformed from the field oxidation film 22 and the first and second layerinsulating films is added between the inductor and the p typesemiconductor substrate 10 and a comparatively small pn junctioncapacitance is added in series between the p− type high-resistancesemiconductor layer 14 a and the n type semiconductor layer 20 a. Thismakes it possible to greatly reduce the overall parasitic capacitancecompared to a conventional case and even at high frequencies the currentflowing in the n type semiconductor layer 20 a, the p− typehigh-resistance semiconductor layer 14 a and the p type semiconductorsubstrate 10 is reduced thereby making it possible to control losscaused by this current. Furthermore, the p− type high-resistancesemiconductor layer 14 a under the spiral A1 wiring film 50 a of theinductor 52 is simultaneously formed in the same process as the p− typeanode layer 14 b of the PN photo diode 44 and the n type semiconductorlayer 20 a is simultaneously formed in the same process as the n typecathode layer 20 b of the PN photo diode 44 and the n type collectorlayer 20 c of the NPN bipolar transistor 46. Because of this, it is notnecessary to increase specialized and dedicated processes to forminductors. Therefore, a high performance inductor with favorable devicecharacteristics that has a high Q value and high inductance can berealized without any reductions in productivity or increases in costoccur which also makes it possible to obtain semiconductor integratedcircuits with even more features and higher performance.

Next, a modified example of the best mode will be described using FIGS.9A and 9B. In the process shown in FIG. 5 of the above-mentioned bestmode, when using the LOCOS method to selectively oxidize the n typeepitaxial layer 20 to form the field oxidation film 22, if a method isutilized to remove a portion or all of the n type epitaxial layer 20before forming the field oxidation film 22, the possibility that none ofthe n type epitaxial layer 20 will remain in the inductor formationregion A has already been described before. This modified example isrelated to an inductor that has none of the layer remaining.

As shown in the plan view of FIG. 9A, the inductor 54 related to thismodified example is identical to the example shown in FIG. 8A. As shownin FIG. 9B however, there is a difference in the cross section comparedto the example shown in FIG. 8A above. The spiral A1 wiring film layer50 a of the inductor 52 is formed on the p type semiconductor substrate10 by way of the p− type high-resistance semiconductor layer 14 a, thefield oxidation film 22 and the first and second layer insulating films40, 48. In other words, only the p− type high-resistance semiconductorlayer is disposed between the p type semiconductor substrate 10, thefield oxidation film 22 and the first and second layer insulating films40, 48.

Even for this case, a composition is formed wherein the p− typehigh-resistance semiconductor layer 14 a is disposed between the p typesemiconductor substrate 10 under the spiral A1 wiring film 50 a (thatcomprises the principal parts of the inductor 54), the field oxidationfilm 22 and the first and second layer insulating films 40, 48.Consequently, even at high frequencies current flowing in the p−high-resistance semiconductor substrate 14 a and the p typesemiconductor substrate is reduced thereby making it possible to controlloss caused by this current. In like manner to the best mode describedabove, it is not necessary to increase specialized and dedicatedprocesses to form the inductor 54. Therefore, the same effects as thebest mode described above can be obtained.

In the best mode described above, simultaneously forming the inductor 52on the same p type semiconductor substrate 10 together with the n typecathode layer 20 b of the PN photo diode 44 and the NPN bipolartransistor 46 was described, namely, when simultaneously forming theinductor 52 in a photo IC manufacturing process. Instead of, forexample, this NPN bipolar transistor 46, a bipolar transistor with adifferent composition or a PNP bipolar transistor with a differentpolarity can be formed. A CMOS (Complementary Metal Oxide Semiconductor)transistor can also be formed.

1. A semiconductor device, comprising: a first conductivity type substrate having an impurity concentration; a first conductivity type first semiconductor layer formed on said substrate and having an impurity concentration lower than the impurity concentration of said substrate; a second conductivity type second semiconductor layer formed on the first semiconductor layer; an insulating film formed on said second semiconductor layer; an inductor formed on said insulating film and having a conducting film defining a width of the inductor; and a bipolar transistor and a photo diode each being formed on the substrate, wherein said first semiconductor layer and second semiconductor layer are each formed under and at least as long as the width of said inductor, wherein said photo diode has an anode and a cathode, said first semiconductor layer is comprised of one of the anode and the cathode of said photo diode, and said second semiconductor layer is comprised of another of the anode and the cathode of said photo diode.
 2. A semiconductor device, comprising: a first conductivity type substrate having an impurity concentration; a first conductivity type first semiconductor layer formed on said substrate and having an impurity concentration lower than the impurity concentration of said substrate; a second conductivity type second semiconductor layer formed on first semiconductor layer; an insulating film formed on said second semiconductor layer; an inductor formed on said insulating film and having a conducting film defining a width of the inductor; and a bipolar transistor and a photo diode each being formed on the substrate, wherein said first semiconductor layer and second semiconductor layer are each formed under and at least as long as the width of said inductor, wherein said bipolar transistor has a collector and said second semiconductor layer is comprised of the collector of said bipolar transistor.
 3. A semiconductor device, comprising: a first conductivity type substrate having an impurity concentration; an inductor formed over said substrate to define a first region having a width; a photo diode formed over said substrate, said photo diode having an anode and a cathode; a bipolar transistor formed over said substrate and having a collector; a first conductivity type first semiconductor layer formed on said substrate and under said first region, to extend at least as long as said width of said first region, said first semiconductor layer having an impurity concentration lower than said impurity concentration of said substrate, said first semiconductor layer including one of the anode and the cathode of said photo diode; a second conductivity type second semiconductor layer formed on said first semiconductor layer to extend at least as long as said width of said first region, said second semiconductor layer including another of the anode and the cathode of said photo diode and the collector of said bipolar transistor; and an insulating film formed on said second semiconductor layer, wherein the inductor is formed on said insulating film.
 4. A semiconductor device according to claim 3, wherein said second semiconductor layer is formed between said insulating film and said first semiconductor layer under the first region.
 5. A semiconductor device according to claim 3, a region with an impurity concentration higher than said first semiconductor layer is formed under a second region of the semiconductor device which does not correspond to the first region defined by said inductor. 